diff -cNr orig_snv105/nge_chip.c MCP79_nge_current/nge_chip.c *** orig_snv105/nge_chip.c 2008-12-18 05:37:43.067317873 +0900 --- MCP79_nge_current/nge_chip.c 2008-12-19 15:50:49.848119788 +0900 *************** *** 512,517 **** --- 512,525 ---- case DEVICE_ID_MCP61_3EE: case DEVICE_ID_MCP61_3EF: + case DEVICE_ID_MCP67_54C: + case DEVICE_ID_MCP67_54D: + case DEVICE_ID_MCP67_54E: + case DEVICE_ID_MCP67_54F: + case DEVICE_ID_MCP73_7DC: + case DEVICE_ID_MCP73_7DD: + case DEVICE_ID_MCP73_7DE: + case DEVICE_ID_MCP73_7DF: dev_param_p->msi = B_FALSE; dev_param_p->msi_x = B_FALSE; dev_param_p->vlan = B_FALSE; *************** *** 529,534 **** --- 537,579 ---- dev_param_p->nge_split = NGE_SPLIT_32; break; + case DEVICE_ID_MCP65_450: + case DEVICE_ID_MCP65_451: + case DEVICE_ID_MCP65_452: + case DEVICE_ID_MCP65_453: + dev_param_p->msi = B_TRUE; + dev_param_p->advanced_pm = B_TRUE; + dev_param_p->tx_pause_frame = B_TRUE; + dev_param_p->rx_pause_frame = B_TRUE; + dev_param_p->jumbo = B_TRUE; + dev_param_p->tx_rx_64byte = B_TRUE; + dev_param_p->rx_hw_checksum = B_TRUE; + dev_param_p->tx_hw_checksum = HCKSUM_IPHDRCKSUM; + dev_param_p->desc_type = DESC_HOT; + dev_param_p->rx_desc_num = NGE_RECV_SLOTS_DESC_3072; + dev_param_p->tx_desc_num = NGE_SEND_SLOTS_DESC_3072; + dev_param_p->nge_split = NGE_SPLIT_96; + break; + + case DEVICE_ID_MCP77_760: + case DEVICE_ID_MCP77_761: + case DEVICE_ID_MCP77_762: + case DEVICE_ID_MCP77_763: + case DEVICE_ID_MCP79_AB0: + case DEVICE_ID_MCP79_AB1: + case DEVICE_ID_MCP79_AB2: + case DEVICE_ID_MCP79_AB3: + dev_param_p->msi = B_TRUE; + dev_param_p->advanced_pm = B_TRUE; + dev_param_p->mac_addr_order = B_TRUE; + dev_param_p->tx_pause_frame = B_TRUE; + dev_param_p->rx_pause_frame = B_TRUE; + dev_param_p->tx_rx_64byte = B_TRUE; + dev_param_p->rx_hw_checksum = B_TRUE; + dev_param_p->tx_hw_checksum = HCKSUM_IPHDRCKSUM; + dev_param_p->desc_type = DESC_HOT; + break; + default: dev_param_p->msi = B_FALSE; dev_param_p->msi_x = B_FALSE; *************** *** 570,575 **** --- 615,622 ---- NGE_TRACE(("nge_chip_cfg_init($%p, $%p, %d)", (void *)ngep, (void *)infop, reset)); + nge_init_dev_spec_param(ngep); + /* * save PCI cache line size and subsystem vendor ID * *************** *** 1010,1015 **** --- 1057,1063 ---- mac = uaddr1.addr_bits.addr; mac <<= 32; mac |= nge_reg_get32(ngep, NGE_UNI_ADDR0); + if (mac != 0ULL && mac != ~0ULL) { /* * workaround for the MAC address reversed issue *************** *** 1019,1025 **** (ngep->mac_addr_reversion || (mac & LOW_24BITS_MASK) == REVERSE_MAC_ELITE || (mac & LOW_24BITS_MASK) == REVERSE_MAC_GIGABYTE || ! (mac & LOW_24BITS_MASK) == REVERSE_MAC_ASUS)) { for (i = 0; i < ETHERADDRL; i ++) { mac_tmp <<= 8; mac_tmp += (mac & 0xffULL); --- 1067,1074 ---- (ngep->mac_addr_reversion || (mac & LOW_24BITS_MASK) == REVERSE_MAC_ELITE || (mac & LOW_24BITS_MASK) == REVERSE_MAC_GIGABYTE || ! (mac & LOW_24BITS_MASK) == REVERSE_MAC_ASUS || ! (mac & LOW_24BITS_MASK) == REVERSE_MAC_APPLE_MB51)) { for (i = 0; i < ETHERADDRL; i ++) { mac_tmp <<= 8; mac_tmp += (mac & 0xffULL); diff -cNr orig_snv105/nge_chip.h MCP79_nge_current/nge_chip.h *** orig_snv105/nge_chip.h 2008-12-18 05:37:43.067570037 +0900 --- MCP79_nge_current/nge_chip.h 2008-12-19 15:50:49.848356959 +0900 *************** *** 47,52 **** --- 47,72 ---- #define DEVICE_ID_MCP61_3EF 0x3ef #define DEVICE_ID_NF3_E6 0xe6 #define DEVICE_ID_NF3_DF 0xdf + #define DEVICE_ID_MCP65_450 0x450 + #define DEVICE_ID_MCP65_451 0x451 + #define DEVICE_ID_MCP65_452 0x452 + #define DEVICE_ID_MCP65_453 0x453 + #define DEVICE_ID_MCP67_54C 0x54c + #define DEVICE_ID_MCP67_54D 0x54d + #define DEVICE_ID_MCP67_54E 0x54e + #define DEVICE_ID_MCP67_54F 0x54f + #define DEVICE_ID_MCP73_7DC 0x7dc + #define DEVICE_ID_MCP73_7DD 0x7dd + #define DEVICE_ID_MCP73_7DE 0x7de + #define DEVICE_ID_MCP73_7DF 0x7df + #define DEVICE_ID_MCP77_760 0x760 + #define DEVICE_ID_MCP77_761 0x761 + #define DEVICE_ID_MCP77_762 0x762 + #define DEVICE_ID_MCP77_763 0x763 + #define DEVICE_ID_MCP79_AB0 0xab0 + #define DEVICE_ID_MCP79_AB1 0xab1 + #define DEVICE_ID_MCP79_AB2 0xab2 + #define DEVICE_ID_MCP79_AB3 0xab3 /* Private PCI configuration register for bus config of ck804/mcp55 */ #define PCI_CONF_HT_INTERNAL 0x4c *************** *** 643,648 **** --- 663,669 ---- #define REVERSE_MAC_ELITE 0x211900ULL #define REVERSE_MAC_GIGABYTE 0xe61600ULL #define REVERSE_MAC_ASUS 0x601d00ULL + #define REVERSE_MAC_APPLE_MB51 0xdf2300ULL /* * Low 32 bit multicast address diff -cNr orig_snv105/nge_main.c MCP79_nge_current/nge_main.c *** orig_snv105/nge_main.c 2008-12-18 05:37:43.068185660 +0900 --- MCP79_nge_current/nge_main.c 2008-12-19 15:50:49.848987885 +0900 *************** *** 153,159 **** nge_hot_txd_check, }; ! static char nge_ident[] = "nVidia 1Gb Ethernet"; static char clsize_propname[] = "cache-line-size"; static char latency_propname[] = "latency-timer"; static char debug_propname[] = "nge-debug-flags"; --- 153,159 ---- nge_hot_txd_check, }; ! static char nge_ident[] = "nVidia 1Gb Ethernet MacBook5,1"; static char clsize_propname[] = "cache-line-size"; static char latency_propname[] = "latency-timer"; static char debug_propname[] = "nge-debug-flags";